Discharge lamp lighting system with overcurrent protection for an inverter switch or switches

ABSTRACT

A lighting system for a fluorescent lamp includes an inverter circuit to which is connected a load circuit including a resonant circuit of an inductor and a capacitor in serial connection, with a lamp connected in parallel with the capacitor. An inversely frequency dependent voltage is applied between the lamp electrodes according to a predefined resonance characteristic such that the resonance frequency is less than a discharge start frequency at which the lamp is to start glowing. For lighting up the lamp the frequency of the inverter output voltage is changed from a first frequency that is higher than the discharge start frequency to a second frequency that is less than the resonance frequency. If the lamp accidentally goes off, the current flowing through the load circuit will advance out of phase with the inverter output voltage, possibly resulting in the destruction of the inverter switch or switches due to overcurrent. This danger is precluded by constantly monitoring the phase of the load current and, in event the load current is found to be in phase advance, by making the inverter output frequency higher than the resonance frequency of the resonant circuit and thereby delaying the phase of the load current.

BACKGROUND OF THE INVENTION

This invention relates to lighting systems for discharge lamps, andpertains more particularly to a lighting system having an inverter andassociated means for control of the inverter output frequency forharmlessly and quickly lighting up a discharge lamp as typified by afluorescent lamp. Still more particularly, the invention concerns, insuch a lamp lighting system, how to protect the switch or switches ofthe inverter against destruction due to overcurrent.

It has been known and practiced conventionally to incorporate aninverter in discharge lamp lighting systems for higher lightingefficiency, among other purposes, as disclosed for example in JapanesePatent No. 2627740. Such known lighting systems having an inverter arealike in including a resonant circuit of an inductor and a capacitorconnected in series between the pair of output terminals of theinverter, with the discharge lamp connected in parallel with thecapacitor. The discharge lamp has its pair of filamentary electrodesconnected in series with the capacitor in order to be preheated beforebeing lit up.

The magnitude of the current flowing through the LC resonant circuit isfrequency dependent, growing to a maximum at a resonance frequency anddiminishing in both increasing and decreasing directions from thatfrequency, because both inductor and capacitor of the resonant circuitinherently possess resistive components. Consequently, the voltageacross the capacitor also maximizes at the resonance frequency anddiminishes in both directions from that frequency.

As is well known, an electron radiating substance is coated on thefilamentary electrodes of the discharge lamp. In a lighting systemincluding an inverter, the lamp electrodes are preheated as aforesaid,instead of being suddenly subjected to a voltage high enough to initiatean electric discharge therebetween, in order to prevent the electronradiating substance from vaporizing or scattering away from thefilaments. The preheating of the lamp electrodes are accomplished bymaintaining the voltage across the capacitor at a constant value lessthan the voltages applied during the subsequent lightup period. The lampis then lit up by decrementing the inverter output frequency and therebyincrementing the voltage across the capacitor until the lamp startsglowing with the commencement of a discharge between the lampelectrodes.

In discharge lamp lighting systems of the above known constructions,there have been a problem left unsolved in connection with the switch,or the pair of switches, of the inverter. An abnormally high currentwould flow through the inverter switch or switches if the current of theLC resonant circuit were in phase advance with respect to the inverteroutput voltage. The inverter switch or switches would be ruined with therepeated flow of such overcurrent.

It is known, however, that the LC resonant circuit operates as inductivereactance at frequencies above the resonance frequency, and ascapacitive reactance at frequencies below the resonance frequency. Thecurrent flowing through the resonant circuit is in phase delay when itis operating as inductive reactance, and in phase advance when it isoperating as capacitive reactance. The inverter is therefore driven soas to provide output frequencies above the resonance frequency of theresonant circuit in order to preclude the danger of destruction of theinverter switch or switches.

As has been mentioned, the lamp is lit up by decrementing the inverteroutput frequency from a predetermined value f₁. in FIG. 6 of thedrawings attached hereto) above the resonance frequency (f₀) until thelamp starts glowing (as at f₂). The voltage required for holding thelamp glowing can be less than its discharge start voltage, so that theinverter output frequency is further reduced after the lamp has been litup, and fixed at a value (f₃) that is less than the resonance frequency(f₀) of the LC resonant circuit. However, on being lit up, the dischargelamp becomes electrically connected in parallel with the resonantcapacitor. The resonant frequency (f₄) of the resulting resonantcircuit, inclusive of the glowing discharge lamp, is less than that (f₀)of the LC resonant circuit exclusive of the lamp and, indeed, the normaloutput frequency (f₃) of the inverter. Thus the inverter outputfrequency (f₃) remains higher than the resonant frequency (f₄) when thelamp is glowing, too, holding the current of the resonant circuit inphase delay and so saving the inverter switch or switches fromovercurrent destruction.

The statement of the preceding paragraph holds true, however, only inthe case where the discharge lamp is in good working state. Near the endof its service life in particular, the lamp may accidentally go offwhile being energized with the inverter output frequency at the normalvalue (f₃). Thereupon this normal frequency will become less than theresonant frequency (f₀) which is then determined by the LC resonantcircuit exclusive of the discharge lamp. Conventionally, the resultingphase advance of the resonant circuit current have caused the flow ofovercurrent to the inverter switch or switches, destroying them in theworst case.

The same accident has occurred with totally malfunctioning or used-updischarge lamps that remain unlit when the inverter output frequency isreduced as above for lighting them up.

An obvious remedy to this inconvenience might seem to hold the inverteroutput frequency above the resonant frequency (f₀) of the resonantcircuit exclusive of the discharge lamp when the lamp is unlit, andhence to prevent current flow through the resonant circuit in phaseadvance. This solution is unsatisfactory, bringing about otherinconveniences, because of the narrowing of the inverter outputfrequency range, or of the voltage range of the resonant capacitor, thatcould be utilized for lighting up the lamp.

SUMMARY OF THE INVENTION

It is therefore among the objects of this invention to save, in adischarge lamp lighting system including an inverter, the inverterswitch or switches from overcurrent destruction when the lampaccidentally goes off, or remains unlit, while being applied with theinverter output voltage in order to be lit up.

Briefly, the present invention may be summarized as a discharge lamplighting system providing for overcurrent protection of an inverterswitch or switches. Included is an inverter circuit to which isconnected a load circuit including a resonant circuit having a capacitorwith which a discharge lamp is to be connected in parallel, in order tocause an inversely frequency dependent voltage to be applied between apair of electrodes of the lamp according to a predefined resonancecharacteristic. The resonant circuit has a resonance frequency that isless than a discharge start frequency at which the lamp is to startglowing. Also connected to the inverter circuit are inverter controlmeans for lighting up the lamp by changing the frequency of the outputvoltage of the inverter circuit from a first frequency which is higherthan the discharge start frequency to a second frequency which is lessthan the resonance frequency of the resonant circuit, and for holdingthe lamp glowing by maintaining the output voltage of the invertercircuit at the second frequency.

Whether the lamp is properly lit up or not is detectable from the phaserelationship between the inverter output voltage and a current flowingthrough the load circuit. Thus the lamp lighting system according to theinvention additionally comprises phase advance detector means forascertaining whether or not a current flowing through the load circuitis in phase advance with respect to the inverter output voltage.Over-riding frequency control means are connected between the phaseadvance detector means and the inverter control means for causing theinverter control means to make the inverter output frequency higher thanthe resource frequency of the resonant circuit when the current flowingthrough the load circuit is ascertained to be in phase advance or phaselead with respect to the output voltage of the inverter circuit.

Since the load current becomes advanced in phase when the discharge lampaccidentally goes off, or remains unlit while being applied with anincreasing voltage past its discharge start voltage, the inverter outputfrequency is automatically readjusted to bring the load current backinto phase delay or phase lag compared to the inverter output voltage.The switch or switches included in the inverter circuit can thus beprotected from destruction due to overcurrent.

Further, if the lamp goes off while being energized with the inverteroutput voltage at the noted second frequency (f₃ in FIG. 6), which isless than the resonance frequency (f₀) of the resonant circuit exclusiveof the lamp but higher than the resonance frequency (f₄) of the resonantcircuit inclusive of the lamp, the inverter output frequency isautomatically made higher than the resonance frequency (f₀) exclusive ofthe lamp. The load current is therefore not to be left in phase advancefor any such extended period of time as to incur damage to the inverterswitch or switches.

It is also to be appreciated that, for lighting up the lamp, theinverter output frequency is invariably decreased linearly from thefirst frequency (f₁) to a frequency less than the resonance frequency(f₀). Consequently, even if the lamp fails to start glowing at theprescribed discharge start frequency (f₂), it may do so as the frequencyis further reduced with the consequent increase in the voltage acrossthe lamp to a value higher than that at the discharge start frequency.

The above and other features and advantages of this invention and themanner of realizing them will become more apparent, and the inventionitself will best be understood, from a study of the followingdescription and attached claims, with reference had to the attacheddrawings showing some preferable embodiments of the invention.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic electrical diagram, partly in block form, of thedischarge lamp lighting system embodying the principles of the presentinvention;

FIG. 2 is a schematic electrical diagram showing in more detail theinverter control circuit of the FIG. 1 discharge lamp lighting system;

FIG. 3 is a block diagram showing in more detail the frequency controlsignal generator circuit included in the FIG. 2 inverter controlcircuit;

FIG. 4 is a schematic electrical diagram of the phase advance detectorcircuit of the FIG. 1 discharge lamp lighting system;

FIG. 5 is a diagram of the waveforms of the output voltage of the FIG. 3frequency control signal generator circuit, and the frequency of theoutput voltage of FIG. 1 inverter circuit;

FIG. 6 is a graph plotting the curves of the resonance capacitor voltageagainst the inverter output frequency when the lamp is lit and unlit, inthe FIG. 1 discharge lamp lighting system;

FIG. 7 is an equivalent diagram of the load circuit of the FIG. 1 lamplighting system;

FIG. 8 is a diagram of waveforms that appear at various parts of theFIG. 1 discharge lamp lighting system when the load current is in phasedelay with respect to the inverter output voltage;

FIG. 9 is a diagram of waveforms that appear at various parts of theFIG. 1 discharge lamp lighting system when the load current is in phaseadvance with respect to the inverter output voltage;

FIG. 10 is a diagram of waveforms that appear at various parts of theFIG. 4 phase advance detector circuit when the load current is in phasedelay with respect to the inverter output voltage;

FIG. 11 is a diagram of waveforms that appear at various parts of theFIG. 4 phase advance detector circuit when the load current is in phaseadvance with respect to the inverter output voltage;

FIG. 12 is a diagram of waveforms that appear at various parts of theFIG. 2 inverter control circuit;

FIG. 13 is a schematic electrical diagram, partly in block form, of amodified inverter control circuit forming a part of another preferredform of discharge lamp lighting system according to the presentinvention;

FIG. 14 is a schematic electrical diagram of a modified phase advancedetector circuit for use with the FIG. 13 inverter control circuit;

FIG. 15 is a partial schematic electrical diagram of a third preferredform of discharge lamp lighting system according to this invention;

FIG. 16 is a schematic electrical diagram of a modified inverter controlcircuit and a modified phase advance detector circuit forming parts ofthe third preferred form of discharge lamp lighting system;

FIG. 17 is a schematic electrical diagram of a fourth preferred form ofdischarge lamp lighting system according to this invention;

FIG. 18 is a schematic electrical diagram of a fifth preferred form ofdischarge lamp lighting system according to this invention;

FIG. 19 is a schematic electrical diagram of a sixth preferred form ofdischarge lamp lighting system according to this invention; and

FIG. 20 is a schematic electrical diagram of a seventh preferred form ofdischarge lamp lighting system according to this invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

The invention will now be described more specifically in terms of thefirst preferred form of discharge lamp lighting system illustrated inits entirety in FIG. 1. Herein shown adapted for lighting up a familiarfluorescent lamp 13 by being powered from a pair of commercialalternating current supply terminals 1 and 2 via a power switch 3, thelighting system broadly comprises a rectifying and smoothing circuit 4connected to the a.c. supply terminals 2 and 3 for providing a directcurrent, an inverter circuit 5 for reconverting the d.c. input from therectifying and smoothing circuit into an a.c. output, a load circuit 6including the fluorescent lamp 13 and connected to the inverter circuit5 via a coupling capacitor 7, an inverter control circuit 8 forcontrollaby driving the inverter circuit 5, and a phase advance detectorcircuit 10 connected to the load circuit 6 via a current detector 9 forascertaining whether the current flowing through the load circuit is inphase advance with respect to the inverter output voltage.

Intended to serve as d.c. power supply of the lamp lighting system, therectifying and smoothing circuit 4 is shown to have a first input 4aconnected to one commercial a.c. supply terminal 1 via the power switch3, and a second input 4b coupled directly to the other a.c. supplyterminal 2. Conventionally comprising a diode rectifier circuit and asmoothing capacitor, both not shown, the rectifying and smoothingcircuit 5 provides a unidirectional voltage between a pair of d.c.supply terminals 4c and 4d.

The inverter circuit 5 comprises a pair of electronic switches Q₁, andQ₂ connected in series with each other between the pair of d.c. outputterminals 4c and 4d of the rectifying and smoothing circuit 4, andcapacitors C₁ and C₂ connected in parallel one with each switch. Theelectronic switches Q₁ and Q₂ are shown as well known metal oxidesemiconductor field-effect transistors (MOS FETs) each having a sourceelectrode connected to a substrate region and essentially comprising aFET switch section S₁ or S₂ and a diode section D₁ or D₂ inverselyconnected in parallel therewith. Alternately turned on and off, the pairof MOS FET switches Q₁ and Q₂ conventionally functions to translate thed.c. output voltage of the rectifying and smoothing circuit 4 into ana.c. voltage for application to the load circuit 6. The capacitors C₁and C₂ function primarily to prevent rapid rise in the drain-sourcevoltages V_(DS) of the switches Q₁ and Q₂ when they are turned off,thereby lessening switching losses.

Notwithstanding the showing of FIG. 1 the switch sections S₁ and S₂ andthe diode sections D₁ and D₂ could be parallel connections of discreteparts. Also, the switch sections could be bipolar transistors ratherthan FETs.

The load circuit 6 includes a resonance capacitor 11 and a resonanceinductor 12 in addition to the fluorescent lamp 13. The fluorescent lamp13 is of familiar design having a tubular envelope 14 of vitreousmaterial with a fluorescent coating on its inner surface, and a pair offilamentary electrodes 15 and 16 at the opposite ends of the envelope.Both electrodes 15 and 16 conventionally bear electron radiatingcoatings. The electrode 15 is shown connected between a pair ofterminals 17 and 18, and the other electrode 16 between another pair ofterminals 19 and 20. It is understood that the fluorescent lamp 13 isreplaceable, being coupled to the terminals 17-20 through conventionalplug-and-socket connections.

The resonance capacitor 11 is connected both to the terminal 17 on oneextremity of one filamentary electrode 15 of the lamp 13 and to theterminal 19 on one extremity of the other lamp electrode 16. Thus theresonance capacitor 7 is in series with the lamp electrodes 15 and 16and in parallel with the discharge path between these lamp electrodes.Consequently, the voltage Vc across the capacitor 11 can be impressedbetween the pair of lamp electrodes 15 and 16.

Shown as a coil with a core, the resonance inductor 12 is connected viathe coupling capacitor 7 between the junction 21a of the inverterswitches Q₁ and Q₂ and the lamp terminal 18. The lamp terminal 20 isconnected to the source electrode of the second MOS FET switch Q₂ of theinverter circuit 5. The resonance capacitor 11 and the resonanceinductor 12 are therefore interconnected in series, forming a serialresonant circuit. Additionally, the inductor 12 is connected in serieswith the fluorescent lamp 13 when the latter is glowing. This inductorcould be connected between the terminal 20 of the lamp 13 and the sourceof the second MOS FET switch Q₂ of the inverter circuit 5. Irrespectiveof whether the lamp 13 is lit or unlit, a current flows through the lampelectrodes 15 and 16 as long as the power switch 3 is closed, becausethe serial circuit is always completed which comprises the inductor 12,first lamp electrode 15, resonance capacitor 11 and second lampelectrode 16. Thus the lamp electrodes 15 and 16 can be preheated bysuch current flow before the lamp is lit up.

As indicated in FIG. 7 showing a circuit equivalent to the load circuit6, the resonance capacitor 11 can be thought of as a serial connectionof capacitance Ca and internal resistance Ra, and the resonance inductor12 as a serial connection of inductance L and internal resistance Rb.The lamp 13 when unlit has its pair of filamentary electrodeselectrically disconnected from each other, so that it is only thecapacitor 11 and inductor 12 that determine the resonance frequency ofthe serial resonance circuit during that time. When the lamp 13 isglowing, on the other hand, the resonance frequency is determined notonly by the capacitor 11 and inductor 12 but also by the lamp, itselectrodes being now electrically interconnected.

Graphically represented in FIG. 6 are the relationships between thefrequency f of the output voltage of the inverter circuit 5 and thevoltage Vc across the resonance capacitor 11. The curve A is the f-Vccharacteristic when the lamp 13 is unlit, and the curve B that when thelamp is glowing. The curves A and B indicate that the capacitor voltageVc is frequency dependent, being the highest at the resonance frequencyf₀ when the lamp is unlit and at the resonance frequency f₁ when thelamp is lit. Below these resonance frequencies the capacitor voltage Vcis in direct proportion to the inverter output frequency f and, abovethat frequency, in inverse proportion thereto. The electric powersupplied from inverter circuit 5 to load circuit 6 has also frequencydependencies similar to the curves A and B.

The capacitance Cc, FIG. 7, of the coupling capacitor 7 is greater thanthe capacitance Ca of the resonance capacitor 11, so much so that theresonance frequency of the circuit comprised of the load circuit 6 andthe coupling capacitor 7 is nearly the same as that of only the loadcircuit 6. In short the capacitance Cc of the coupling capacitor 7hardly affects the resonance frequency.

The present invention utilizes the frequency range of the curve A abovethe resonance frequency f₀, where the capacitor voltage Vc is inverselydependent upon the inverter output frequency f, for preheating andlighting up the lamp 13. The lamp is to start glowing at f₂, and is tobe kept glowing at f₃ which is intermediate the resonance frequencies f₁and f₄ of the curves A and B.

The configurations of the inverter control circuit 8 and phase advancedetector circuit 10, to be set forth subsequently with reference toFIGS. 2-4, will be better understood by first studying in connectionwith FIGS. 5 and 6 how the lamp 13 is lit up in the instant embodimentof the invention.

In the bottom half of FIG. 5 is plotted the curve of the frequency f ofthe a.c. output produced by the inverter circuit 5 for preheating andlighting up the lamp 13, against time t. As the power switch 3, FIG. 1,is closed at a moment t₀ in time, the inverter circuit 5 is caused tosupply to the load circuit 6 the a.c. output of the frequency f₁ ofwhich, as indicated in FIG. 6, the corresponding resonance capacitorvoltage Vc₁ is significantly less than the voltage Vc₂ at which the lamp13 is designed to start an electric discharge. The lamp 13 willtherefore remain unlit, but its filaments 15 and 16 will be preheated bycurrent flow through the resonance circuit of capacitor 11 and inductor12. The inverter output is maintained at this preheat frequency f₁during a prescribed preheat period Ta, from to t₀ t₁, of, say, 500-1000milliseconds. The preheat frequency f₁ may be set somewhere between 80and 90 kilohertz.

The inverter output frequency need not be constant throughout thepreheat period Ta; instead, it may be decremented with time in a rangeabove f₁.

During the subsequent lightup period Tb, from t₁ to t₄, the inverteroutput frequency is dropped from f₁ to f₃, either linearly, as depictedin FIG. 5, or in discrete steps, past the intended discharge startfrequency f₂ and the resonance frequency f₀ of the period the lamp isunlit. If normal, the lamp 13 will start glowing at the discharge startfrequency f₂, or at t₂ in FIG. 5, or thereabouts. Even if the lamp failsto start glowing at f₂ because of fluctuations in performance, theinverter output frequency will continue dropping toward the resonancefrequency f₀, with the consequent continuation of the rise in capacitorvoltage Vc toward the peak value Vca The lamp will start a discharge byt₃ when the resonance frequency f₀ is reached, t₃ being earlier than t₄,if the performance fluctuations are within the range of allowance.

As has been set forth in connection with the prior art, the lamp onglowing will become electrically connected in parallel with theresonance capacitor 11, causing a change in the frequency dependence ofthe capacitor voltage Vc from curve A to curve B in FIG. 6. The inverteroutput frequency is dropped to f₃ at t₄ and fixed at that value as longas the lamp is held glowing thereafter. The frequency f₃ is such thatthe corresponding capacitor voltage Vc₃ is less than the discharge startvoltage Vc₂.

Near the end of its useful life in particular, the lamp 13 may becomeunlit while being driven at the inverter output frequency f₃, againconverting the frequency dependence of the capacitor voltage Vc fromcurve B back to curve A. Thereupon the frequency f₃ would be less thanthe resonance frequency f₀ of the resonant circuit exclusive of the lamp13. The current I_(L) flowing through the load circuit 6 would then bein phase advance with respect to the inverter output, because then theload circuit 6 would be capacitive reactance. Overcurrent would thenflow through the inverter switches Q₁ and Q₂, possibly to theirdestruction, in the absence of the novel inverter switch control meansof the instant invention to be set forth hereafter.

With reference back to FIG. 1 the inverter control circuit 8incorporates novel circuit means according to the invention forcontrolling the inverter switches Q₁ and Q₂ not only when the lamp 13 isfunctioning normally but also, in cooperation with the current detector9 and phase advance detector circuit 10, when the lamp goes off afterbeing lit up as above. The inverter control circuit 8 has two outputsconnected to the gate electrodes of the inverter switches Q₁ and Q₂ byway of conductors 21 and 22 and to the phase advance detector circuit 10by way of conductors 23 and 24. It is understood that the invertercontrol circuit 8 is additionally coupled to the source electrodes ofthe inverter switches Q₁ and Q₂ for supplying thereto gate-sourcevoltage signals V_(GS1) and V_(GS2) as inverter switch control signals.

The current detector 9 is coupled to the conductor through which thereflows the load current I_(L) and is connected to the phase advancedetector circuit 10 by way of a conductor 25. A current transformer is apreferred example of the current detector 9, although other devices suchas a magnetoelectric converter might be employed.

Inputting the load current I_(L) and the gate-source voltage signalsV_(GS1) and VGS₂, the phase advance detector circuit 10 constantlymonitors whether the load current is in phase advance with respect tothe inverter output voltage. The resulting outputs from the phaseadvance detector circuit 10 are fed over conductors 26 and 27 to theinverter control circuit 8.

Reference is now invited to FIG. 2 for detailed discussion of theinverter control circuit 8. Broadly, this circuit 8 may be consideredthe combination of a variable frequency pulse generator circuit 28, aswitch control signal forming circuit 29, a frequency control signalgenerator circuit 30, and an overriding frequency control circuit 31.

The variable frequency pulse generator circuit 28 is essentially avoltage controlled oscillator, comprising a capacitor 32 for producing atriangular wave, a charging circuit 33 for the capacitor 32, and adischarging and wave shaping circuit 34, in order to generate pulses ata repetition rate depending upon the frequency control voltage signalfed from the frequency control signal generator circuit 30.

The charging circuit 33 of the pulse generator circuit 28 comprises apair of transistors 35 and 36 constituting a Miller circuit, anotherpair of transistors 37 and 38 constituting another Miller circuit, twocurrent control transistors 39 and 40, and six resistors 41, 42, 43, 44,45 and 46. The transistors 35 and 36 are both of PNP type, having theiremitters connected to a supply terminal 47 via resistors 41 and 42,respectively. It is understood that the supply terminal is connected toa control power supply, not shown, which is connected to the rectifyingand smoothing circuit 4, FIG. 1. The bases of the transistors 35 and 36are interconnected and connected to the collector of the transistor 35,which collector is grounded via the resistor 43. The collector of theother transistor 36 is grounded via the transistor 39.

Constituting another Miller circuit, the transistors 37 and 38 are alsoboth of PNP type, also having their emitters connected to the supplyterminal 47 via the resistors 44 and 45, respectively, and their basesjointly connected to the collector of the transistor 37, which collectoris grounded via the transistor 40 and resistor 46. The collector of theother transistor 38 is connected to the capacitor 32 via a currentlimiting resistor 47a which is shown external to the charging circuit33. The capacitor 32 has another terminal grounded. Of NPN type, thetransistor 40 has its base connected to the collector of the transistor36, so that the transistor 39 serves as a variable resistance bypass forthe base current of the transistor 40.

The discharging and wave shaping circuit 34 comprises three resistors48, 49 and 50, a discharging transistor 51, two comparators 52 and 53,and an RS flip flop 54. The resistors 48-50 are serially connectedbetween supply terminal 47 and ground for providing two differentreference voltages for the comparators 52 and 53. The first comparator52 has one input connected to the junction between capacitor 32 andresistor 47a, and the other input to the junction between the resistors48 and 49. Thus the first comparator 52 compares the triangular wavevoltage V₃₂ across the capacitor 32 with the first reference voltage V₁from between the resistors 48 and 49, going high each time thetriangular wave voltage crosses the first reference voltage. Havinghysteresis, the first comparator 52 provides a series of pulses with apredetermined duration (designated Td in FIG. 12).

The second comparator 53 has one input connected to the junction betweencapacitor 32 and resistor 47a, and the other input to the junctionbetween the resistors 49 and 50. The second comparator 53 goes high eachtime the triangular wave voltage V₃₂ crosses the second referencevoltage V₂ from between the resistors 49 and 50, the second referencevoltage being higher than the first V₁. Also having hysteresis, thesecond comparator 52 provides pulses of approximately the same durationas that of each first comparator output pulse.

The first comparator 52 delivers its output V₅₂ both to the switchcontrol signal forming circuit 29 and to the set input S of the flipflop 54 for discharge control of the capacitor 32. The second comparator53 delivers its output V₅₃ to the reset input R of the flip flop 54. Theoutput V₅₄ from the phase-inverted output from the flip flop 54 willtherefore go low each time the flip flop is set by the leading edge of apulse from the first comparator 52, and high each time the flip flop isreset by the leading edge of a pulse from the second comparator 53.

Connected to the base of the transistor 51, the flip flop 54 will causeconduction therethrough while being reset (as from t₃ to t₄ in FIG. 12),providing a discharge path for the capacitor 32 via the resistor 47aSince this discharge circuit has a fixed time constant, the periodduring which the flip flop 54 stays reset is unchanged. The periodduring which this flip flop 54 stays set (as from t₁ to t₃ in FIG. 12),on the other hand, is subject to change as the current charging thecapacitor 32 is under control. It will be seen from the foregoing thatthe first comparator 52 functions as wave shaping circuit for thetriangular wave voltage V₃₂ and additionally participates in dischargecontrol of the capacitor 32.

The switch control signal forming circuit 29 responds to the pulses V₅₂from the pulse generator circuit 28 by producing the gatesource voltagesignals V_(GS1) and V_(GS2) for on/off control of the inverter switchesQ₁ and Q₂, FIG. 1. Included are a NOT circuit 55 and a trigger flip flop56 which are both connected to the first comparator 52 of the pulsegenerator circuit 28. Triggered by the leading edges of the outputpulses V₅₂ from the first comparator 52 (as at t₃ and t₄ in FIG. 12),the flip flop 56 switches between the two stable states.

Also included in the switch control signal forming circuit 29 are afirst AND gate 57 having its two inputs connected to the noninvertingoutput of the flip flop 56 and to the NOT circuit 55, and a second ANDgate 58 having its two inputs connected to the inverting output of theflip flop 56 and to the NOT circuit 55. The two AND gates 57 and 58produces the gate-source voltage signals V_(GS1) and V_(GS2) fordelivery both to the switches Q₁ and Q₂ of the inverter circuit 5, FIG.5, over the conductors 21 and 22 and to the phase advance detectorcircuit 10 over the conductors 23 and 24.

The two gate-source voltage signals V_(GS1) and V_(GS2) are sointerrelated (FIG. 12) that there are what may be termed "dead times"during which neither of the inverter switches Q₁ and Q₂ is actuated bythese signals. Each dead time, determined by the duration Td of eachoutput pulse from the comparators 52 and 53, should preferably be notless than the time required for the voltage across the capacitors C₁ andC₂ to become zero by reverse charging.

Shown also in FIG. 2, the overriding frequency control circuit 31 of theinverter control circuit 8 comprises two switches 59 and 60, both shownas transistors, which are connected in parallel with the triangular wavegenerating capacitor 32 of the pulse generator circuit 28 for itscompulsory discharge. The bases of these switching transistors 59 and 60are connected to the phase advance detector circuit 10, shown in blockform in FIG. 1 and yet to be detailed with reference to FIG. 4, by wayof the conductors 26 and 27 in order to be thereby rendered conductiveupon detection of the phase advance of the load current I_(L) by thatcircuit 10.

As drawn block diagrammatically in FIG. 3, the frequency control signalgenerator circuit 30 of the inverter control circuit 8 comprises apreheat timer 61, a lightup timer 62, and a control voltage generatorcircuit 63. Both timers 61 and 62 have their outputs connected to thecontrol voltage generator circuit 63. The output of the preheat timer 61is additionally connected to the lightup timer 62.

The preheat timer 61 responds to the closure of the power switch 3, FIG.1, by putting out a preheat pulse signal indicative of the preheatperiod Ta from to to t₀ t₁ in FIG. 5, for delivery to the controlvoltage generator circuit 63. Capable of generating a variable controlvoltage Vf for inverter output frequency control, this circuit 63 putsout the control voltage V₁ of relatively high, constant magnitude whenthe pulse output from the preheat timer 61 indicates the preheat periodTa, as shown in the top half of FIG. 5.

Immediately upon lapse of the preheat period Ta the light up timer 62puts out a lightup pulse signal representative of the lightup period Tbfrom t₁ to t₄ in FIG. 5. The control voltage generator circuit 63responds to this input pulse by putting out the ramp voltage thatdecreases linearly in value from V₁ to V₂ during the lightup period Tb.The ramp voltage may be obtained by causing a capacitor, not shown, todischarge. After t₄ in FIG. 5, when the lamp 13 is to be kept glowing,the control voltage generator circuit 63 produces another, lowerconstant voltage V₂.

With reference back to FIG. 2 the control voltage Vf from the circuit 30is impressed to the gate of the transistor 39 of the charging circuit33. This transistor 39 is meant for use as variable resistor, impedingthe flow of the base current of the transistor 40 in proportion to thecontrol voltage Vf The resistance of the transistor 39 is high when thehigh control voltage V₁ is being impressed to its base during thepreheat period Ta, correspondingly limiting the bypassing of the basecurrent of the transistor 40 to the transistor 39. The collector currentof the transistor 40 will therefore be of relatively great magnitude,and so will be that of the transistor 38, resulting in relatively rapidcharging of the triangular wave capacitor 32. The gate-source voltagesignals V_(GS1) and V_(GS2) for the on-off control of the inverterswitches Q₁, and Q₂ will be correspondingly high in repetitionfrequency. Thus, as indicated in FIG. 5, the inverter output frequency fwill be of the relatively high, constant value f₁, corresponding to thehigh control voltage V₁, during the preheat period Ta.

The triangular wave capacitor 32 will be charged at decreasing rateswith the linear decrease in the magnitude of the control voltage Vf fromV₁ to V₂ during the lightup period Tb as in the top half of FIG. 5. Asthe gate-source voltage signals V_(GS1) and V_(GS2) becomecorrespondingly lower in repetition frequency, the inverter outputfrequency f will diminish from f₁ to f₃ as in the bottom half of FIG. 5.

It is self-evident from the foregoing that the inverter output frequencyf will be of the low, constant value f₃ when the control voltage Vf isfixed at the low value V₂ after t₄ in FIG. 5.

The phase advance detector circuit 10, shown in block form in FIG. 1, isillustrated in detail in FIG. 4. It comprises two comparators CP₁ andCP₂, two RS flip flops FF₁ and FF₂, two NOT circuits INV₁ and INV₂, andtwo logic circuits G₁ and G₂. The positive input of the first comparatorCP₁ and the negative input of the second comparator CP₂ are bothconnected to the current detector 9, FIG. 1, via the conductor 25. Thenegative input of the first comparator CP₁ is connected to a firstreference voltage source E₁, and the positive input of the secondcomparator CP₂ to a second reference voltage source E₂. The firstreference voltage source E₁ provides a reference voltage +e that ishigher than the mean value (e.g. zero) of the voltage Vi correspondingto the load current I_(L), as indicated in FIGS. 10 and 11. The secondreference voltage source E₂ provides another reference voltage -e thatis lower than the mean value of the voltage Vi.

The first flip flop FF₁ has its set input S connected to the firstcomparator CP₁, and its reset input R to the first NOT circuit INV₁ andthence to the AND gate 57, FIG. 2, of the switch control signal formingcircuit 29. The second flip flop FF₂ has its set input S connected tothe second comparator CP₂, and its reset input R to the second NOTcircuit INV₂ and thence to the AND gate 58, FIG. 2, of the switchcontrol signal forming circuit 29.

The logic circuits G₁ and G₂ are both shown as inhibit AND gates. Thefirst logic circuit G₁ has its inverting input connected to the firstcomparator CP₁, and its noninverting input to the noninverting output Qof the first flip flop FF₁. The second logic circuit G₂ has itsinverting input connected to the second comparator CP₂, and itsnoninverting input to the noninverting output Q of the second flip flopFF₂. The outputs of the logic circuits G₁ and G₂ are connectedrespectively to the bases of the switching transistors 59 and 60, FIG.2, of the overriding frequency control circuit 31.

Operation

FIG. 8 depict the waveforms of the voltages V_(GS1), V_(GS2), V_(DS1)and VDS₂ and currents I_(Q1), I_(Q2), I_(C1), I_(C2) and I_(L) appearingat correspondingly designated parts of the FIG. 1 lamp lighting systemwhen the lamp 13 is glowing normally. From t₀ to t₁ in FIG. 8 is one ofthe noted dead times during which neither of the inverter switches Q₁and Q₂ is actuated. Owing to the functioning of the capacitors C₁ and C₂during the t₀ -t₁ dead time the drain-source voltage V_(DS1) of thefirst inverter switch Q₁ will become zero at t₁, when the gate-sourcevoltage V_(GS1) will be impressed to this first inverter switch. Thecurrent I_(Q1) will then flow through the first inverter switch Q₁ as acircuit is completed which comprises the first d.c. supply terminal4_(C), first inverter switch Q₁, coupling capacitor 7, inductor 12,resonance capacitor 11, and second d.c. supply terminal 4d.

During the t₁ -t₂ period in FIG. 8 a current corresponding to the finalpart of one negative half-cycle of the load current I_(L) will flowthrough the diode section D₁ of the first inverter switch Q₁. Then,during the subsequent t₂ -t₃ period, a positive-going current will flowthrough the switch section S₁ of the first switch Q₁. The waveforms ofthe first switch current I_(Q1), and load current I_(L) during the t₁-t₃ period will be sinusoidal, determined by the inductance of theinductor 12, the capacitance of the resonance capacitor 11, and thecapacitance of the glowing lamp 13.

At t₃, when the gate-source voltage V_(GS1) of the first inverter switchQ₁ becomes zero, the current I_(Q1) that has been flowing through thefirst switch will start flowing through the closed circuit comprisingthe load circuit 6, the coupling capacitor 7, and the second capacitorC₂ connected in parallel with the second inverter switch Q₂. As thesecond capacitor C₂ is thus reversely charged with the current I_(C2),the voltage across this second capacitor and therefore the drain-sourcevoltage V_(DS2) of the second inverter switch Q₂ will start droppinglinearly at t₃ and become zero at t₄.

The drain-source voltage V_(DS1) of the first inverter switch Q₁, on theother hand, will rise linearly from zero during the t₃ -t₄ period, thatvoltage being the voltage between the pair of supply terminals 4c and 4dminus the drain-source voltage V_(DS2) of the second inverter switch Q₂.A zero-volt switching will thus be achieved when the first switch Q₁, isturned off. The gate-source voltage V_(GS2) of the second inverterswitch Q₂ will go high at t₄ when the drain-source voltage V_(DS2) ofthe second inverter switch Q₂ becomes zero, accomplishing a zero-voltswitching when the second inverter switch is turned on.

The diode section D₂ of the second inverter switch Q₂ will become nolonger reverse biased by the second capacitor C₂ at t₄ when the voltageacross this second capacitor becomes zero. The load current I_(L) willthen start flowing to the diode section D₂, so that the current I_(Q2)of the second inverter switch Q₂ flows reversely through its diodesection D₂ from t₄ to t₅ ; that is, the current flows through the closedcircuit of the load circuit 6 with the inductor 12, the second inverterswitch diode section D₂, and the coupling capacitor 7 during this t₄ -t₅period.

The positive going current I₂ of the second inverter switch Q₂ duringthe subsequent t₅ -t₆ period will flow through the circuit of the loadcircuit 6, coupling capacitor 7, and second inverter switch Q₂. Thiscurrent I_(Q2) flows through the load circuit 6 in a direction oppositeto that of the current I_(Q1) of the first inverter switch Q₁, duringthe t₂ -t₃ period.

At t₆ s, when the second inverter switch Q₂ goes off, the current I_(Q2)that has been flowing through the second switch Q₂ will flow to bothcapacitors C₁ and C₂. With the flow of the currents I_(C1) and I_(C2)during the t₆ -t₇ period, the voltage across the first capacitor C₁ willdrop linearly as it is charged reversely, and so will the drain-sourcevoltage V_(DS1) of the first inverter switch Q₁. The voltage across thesecond capacitor C₂ and the drain-source voltage V_(DS2) of the secondinverter switch Q₂ will rise linearly. Thus are accomplished zero-voltswitchings when the second inverter switch Q₂ is turned off and when thefirst inverter switch Q₁ is turned on.

As has been set forth with reference to FIG. 5, the output frequency fof the inverter circuit 5 is varied from f₁ to f₃, FIG. 6, during thelightup period Tb in the course of which the lamp 13 is to startglowing, as at t₂ in FIG. 5. The resulting operation of the FIG. 1 lamplighting system will be similar to what has been hereinbefore explainedin connection with FIG. 8, only if the load circuit 6 is an inductivereactance.

It will also be recalled in association with FIG. 6 that the loadcircuit 6 becomes a capacitive reactance if the lamp 13 accidentallygoes off and if, as has been the case heretofore, the inverter outputfrequency f was left as at f₃, less than the resonance frequency f₀ ofthe curve A. Then, as indicated in FIG. 9, the currents I_(Q1) andI_(Q2) of the inverter switches Q₁ and Q₂ and the load current I_(L)will all be in phase advance with respect to the gate-source voltagesV_(GS1) and V_(GS2) as well as to the resulting inverter output voltage.The current waveforms I_(Q1), I_(Q2) and I_(L) are depicted in thisdiagram so that they become increasingly more phase advanced with time.

During the t₀ -t₁ period in FIG. 9, being in phase advance, both firstinverter switch current I_(Q1) and load current I_(L) are shown to crosszero at t₁ which precedes t₂ when the first gate-source voltage V_(GS1)goes low. The negative-going first inverter switch current I_(Q1) andload current I_(L) from t₁ to t₃ will flow through the circuitcomprising the load circuit 6, coupling capacitor 7, and the diodesection D₁ of the first inverter switch Q₁. The second inverter switchQ₂ will turn on at t₃ when its gate-source voltage V_(GS2) goes high.The load current I_(L) will now flow to the second inverter switch Q₂.At the same time the carriers that have been stored on the firstinverter switch diode section D₁ will be released, and the current dueto this carrier release will flow into the second inverter switch Q₂.The pair of outputs 4c and 4d of the rectifying and smoothing circuit 4are short-circuited by the first inverter switch diode section D₁ andthe second inverter switch Q₂ from t₃ to t₄, so that the currents I_(Q1)and I_(Q2) will be of greater magnitude than the peak value of thecurrent I_(Q1) from t₀ to t₁.

Should the load circuit 6 be left in phase advance, overcurrent wouldflow each time the second inverter switch Q₂ is turned on, possiblyresulting in the destruction of either or both of the inverter switchesQ₁ and Q₂. The present invention precludes this danger by making theinverter output frequency higher than the resonance frequency f₀ on theFIG. 6 curve A upon detection of the phase advance of the load currentby the phase advance detector circuit 10, FIG. 4. Overcurrent protectionis accomplished as the load circuit 6 is turned into an inductivereactance in this manner.

How the phase advance detector circuit 10 detects the phase advance willbe best understood by studying the waveforms of FIGS. 10 and 11. FIG. 10shows the waveforms appearing at various parts of the FIG. 4 phaseadvance detector circuit 10 when the load circuit 6 is inductivereactance, with the load current I_(L) in phase delay with respect tothe inverter output voltage and the inverter switch gate-source voltagesV_(GS1) and V_(GS2). FIG. 11 shows the waveforms appearing at the sameparts of the phase advance detector circuit 10 when the load circuit 6is accidentally turned into capacitive reactance, with the load currentI_(L) consequently in phase advance with respect to the inverter outputvoltage and the inverter switch gate-source voltages. The output voltageVi of the current detector 9, corresponding to the load current I_(L)flowing through the load circuit 6, is shown as a sinusoidal wave inboth FIGS. 10 and 11 for ease of explanation.

Directed over the line 25 into the comparators CP₁ and CP₂, FIG. 4, ofthe phase advance detector circuit 10, the output voltage Vi of thecurrent detector 9 will be compared with the two reference voltages +eand -e indicated by the dashed lines in both FIGS. 10 and 11. Thesereference voltages have positive and negative values, respectively, thatare so close to zero that the comparators CP₁ and CP₂ will put outpulses having durations only somewhat less than 180 electrical degreesof the current detector output voltage Vi.

Thus, in both FIGS. 10 and 11, the intervals t₃ -t₅, t₇ -t₉ and so forthbetween the output pulses of the two comparators CP₁ and CP₂ (i.e. theperiods during which pulses are produced by neither of thesecomparators) represent those fractions of the current detector outputvoltage Vi which are close to zero, not more in value than the firstreference voltage +e and not less in value than the second referencevoltage -e. According to the present invention, and in this embodiment,whether the control pulses of the inverter switches Q₁ and Q₂ (i.e. thegate-source voltages V_(GS1) and V_(GS2) are properly controlling themor not is determined from whether the trailing edges of the controlpulses are located within the pulse intervals t₃ -t₅, t₇ -t₉ and soforth.

For that determination the output pulses of the comparators CP₁ and CP₂are directed to the set inputs S of the flip flops FF₁ and FF₂,respectively, to the reset inputs R of which are directed the inversionsof the gate-source voltages V_(GS1) and V_(GS2). The resulting pulseoutputs from the flip flops FF₁ and FF₂ are as shown also in FIGS. 10and 11. It will be observed from FIG. 10 that the flip flop outputpulses are less in duration than the output pulses of the comparatorsCP₁ and CP₂ during the normal operation of the lamp lighting system,thereby keeping low the outputs V₂₆ and V₂₇ from the inhibit AND gatesG₁ and G₂.

In event the lamp has accidentally gone off, on the other hand, theoutput pulses of the flip flop FF₁ and FF₂ will grow longer in durationthan the output pulses of the comparators CP₁ and CP₂, as in FIG. 11.There will therefore be periods, as from t₃ to t₄, from t₇ to t₈, andfrom t₁₀ to t₁₁, during which the comparators CP₁ and CP₂ are lowwhereas the flip flops FF₁ and FF₂ are high. The logic circuits G₁ andG₂ will then produce short duration pulses, indicating that the loadcurrent I_(L) is in phase advance or phase lead.

The short duration pulses V₂₆ and V₂₇ from the phase advance detectorcircuit 10 will be impressed to the bases of the switching transistors59 and 60, FIG. 2, of the overriding frequency control circuit 31.Thereupon the repetition rates of the gate-source voltages V_(GS1) andV_(GS2) will become higher, as has been set forth in connection with thewaveforms after the moment t₆ in FIG. 12, making the resulting inverteroutput frequency f higher than the resonance frequency f₀ of the curve Ain FIG. 6. For example, the resulting inverter output frequency is f₂between f₀ and f₁.

If the lamp remains unlit, the load current I_(L) will again advance inphase. Thereupon the foregoing cycle of operation will be repeated todelay the phase of the load current. Such alternate advances and delaysin the phase of the load current is far preferable to the conventionalpractice of leaving the current advanced in phase from the viewpoint ofovercurrent protection of the inverter switches Q₁ and Q₂. Experimenthas proved that, protected against overcurrent according to the instantinvention, these switches become drastically less heated than if theload current is left advanced in phase according to the prior art.

The automatic return of the inverter output frequency to the normalvalue f₃, FIG. 6, after the phase advance of the load current has beencorrected is preferred because the lamp, after once going off for somereason or other, may in all likelihood resume glowing. The useful lifeof the lamp can thus be extended to the maximum possible degree.

It will also be appreciated that the inverter output frequency f isreduced from f₁ to f₃, FIGS. 5 and 6, past the resonance frequency f₀even if the lamp fails to light up at the prescribed frequency f₂. Eventhen the lamp may start an electric discharge as the inverter outputfrequency draws nearer the resonance frequency f₀. This feature willprove to be an advantage since the lamp lighting system according to theinvention must be expected to be put to use with discharge lamps ofgreatly different lightup characteristics.

Second Form

The second preferred form of discharge lamp lighting system according tothe invention features a modified inverter control circuit 8a, FIG. 13,and a modified phase advance detector circuit 10a, FIG. 14. Thesemodified circuits 8a and 10a are intended for use in the FIG. 1 lightingsystem in substitution for their first disclosed counterparts 8 and 10.Only these modified circuits will therefore be described in detail, itbeing understood that the other parts of the second system are as setforth above in conjunction with FIGS. 1-12.

The modified inverter control circuit 8a of FIG. 13 differs from theFIG. 2 inverter control circuit 8 only in the construction of theoverriding frequency control circuit 31a. This circuit 31a comprises avariable resistor in the form of a transistor 60a and an integratingcircuit 74. Unlike the switching transistor 60, FIG. 2, of the precedingembodiment, which is connected in parallel with the capacitor 32, thetransistor 60a is connected in parallel with the resistor 46 of thecharging circuit 33 of the pulse generator circuit 28. The integratingcircuit 74 has its input connected to the single output conductor 27 ofthe modified phase advance detector circuit 10a, FIG. 14, for smoothingthe output V₂₇ therefrom preparatory to delivery to the base of thetransistor 60a.

A comparison of FIG. 14 with FIG. 4 will reveal that the modified phaseadvance detector circuit 10a is similar to the original circuit 10except for the absence of the first comparator CP₁, first referencevoltage source E₁, first flip flop FF₁, first logic circuit G₁, andfirst inverter INV₁ from the former. The comparator CP₂, referencevoltage source E₂, flip flop FF₂, logic circuit G₂, and inverter INV₂are left in the circuit 10a, with the input of the inverter INV₂connected to the output line 24 of the inverter control circuit 8, andthe negative input of the comparator CP₂ connected to the currentdetector output line 25. The inverter INV₂ could, however, be connectedto the inverter control circuit output line 25 for inputting thegate-source voltage V_(GS1) of the first inverter switch Q₁ instead ofthe gate-source voltage V_(GS2) of the second inverter switch Q₂.

The modified phase advance detector circuit 10a will operate just likethe FIG. 4 circuit 10, producing a low output as long as the loadcurrent is in phase delay. Upon phase advancement of the load current,on the other hand, the phase advance detector circuit 10a will put outpulses similar to those shown in FIG. 11 for the FIG. 4 circuit 10. Theoverriding frequency control circuit 31a will operate, upon receipt of aprescribed number, inclusive of one, of pulses from the phase advancedetector circuit 10a within a preset length of time, to cause anincrease in the current charging the triangular wave capacitor 32 of thepulse generator circuit 28 so as to make the inverter output frequency fhigher than the resonance frequency f₀ on the curve A in FIG. 6. Thusthe second embodiment of the invention accomplishes the same purposes asthe first disclosed embodiment.

Third Form

In still another preferred form of lamp lighting system according to theinvention, the current detector 9 is rearranged as in FIG. 15 fordetecting phase advancement from the current of the second inverterswitch Q₂, and a modified phase advance detector circuit is provided asat 10b in FIG. 16 for half-wave phase detection like the FIG. 14 circuit10a The inverter control circuit is also modified correspondingly, asillustrated in FIG. 16 and therein generally labeled 8b. This thirdembodiment of the invention is similar to the first embodiment in theother details of construction.

The FIG. 15 current detector 9 detects the current I_(Q2) of the secondinverter switch Q₂, that current being shown in both FIGS. 8 and 9 inconjunction with the first disclosed embodiment. The current detectoroutput signal Vi is sent over the line 25 to the phase advance detectorcircuit 10b.

The phase advance detector circuit 10b is shown greatly simplified inFIG. 16 because it is identical in construction with the FIG. 14 phaseadvance detector circuit 10a except for the inputs of the comparatorCP₂. As indicated in FIG. 16, the comparator CP₂ has a positive inputconnected to the current detector 9 by way of the line 25, and anegative input connected to the reference voltage source E₂ forinputting a positive, instead of negative, reference voltage +e.

The modified inverter control circuit 8b, FIG. 16, features anoverriding frequency control circuit 31b having but one switchingtransistor 60. Connected in parallel with the triangular wave generatingcapacitor 32, as is the transistor 60 of the FIG. 2 circuit 31, thetransistor 60 has its base connected directly to the output line 27 ofthe phase advance detector circuit 10b.

Such being the construction of the third preferred form of lamp lightingsystem according to the invention, it operates substantially like thefirst form and gains substantially the same advantages therewith. Theonly operational difference is that the phase advancement is correctedonly half as often as in the first embodiment.

Fourth Form

FIG. 17 shows the fourth preferred form of lamp lighting systemaccording to this invention, which is similar in construction to thefirst form except for having a half-bridge inverter circuit 5a of itselfknown construction in place of the FIG. 1 inverter circuit 5. Theinverter circuit 5a has a serial circuit of two voltage-dividingcapacitors 75 and 76 connected in parallel with the serial circuit oftwo inverter switches Q₁ and Q₂. The load circuit 6 is connected betweenthe junction 21a between the inverter switches Q₁ and Q₂ and thejunction 77 between the voltage-dividing capacitors 75 and 76. The loadcircuit 6 is of the same construction as those of the foregoingembodiments, comprising the fluorescent lamp 13 and the resonancecapacitor 11 and inductor 12.

No operational description is considered necessary because the half-waveinverter circuit 5a, the sole feature of this embodiment, is ofconventional design and itself operates just like the FIG. 1 invertercircuit 5.

Fifth Form

The inverter circuit 5 of the first embodiment of the invention may befurther modified as shown at 5b in FIG. 18. The modified invertercircuit 5a differs from the FIG. 1 inverter circuit 5 only in that theformer does not have the first capacitor C₁. Incorporating this invertercircuit 5a, the lamp lighting system needs no alteration ofconstruction.

When the first switch Q₁ of the modified inverter circuit 5a is turnedoff, both the voltage across the remaining capacitor C₂ and thedrain-source voltage V_(DS2) of the second inverter switch Q₂ will dropgradually. The drain-source voltage V_(DS1) of the first inverter switchQ₁ does not rise suddenly, being equal to the supply voltage minus thevoltage across the capacitor C₂. Zero-volt switching can thus berealized when the first inverter switch Q₂ is turned off.

The possible phase advancement of the load current in this fifthembodiment is contained in the same manner as in the first.

Sixth Form

The sixth preferred form of lamp lighting system shown in FIG. 19includes still another modified inverter circuit 5c in combination witha correspondingly modified load circuit 6a, the other details ofconstruction being similar to those of the first preferred form.

The inverter circuit 5c has a transformer primary winding 80 having acenter tap 81 connected to the d.c. output terminal 4c of the rectifyingand smoothing circuit 4. Between the opposite extremities of thetransformer primary 80 and the other d.c. output terminal 4d of thecircuit 4 are connected respectively the parallel circuits of theinverter switches Q₁ and Q₂ and the capacitors C₁ and C₂. The inverterswitches Q₁ and Q₂ are so oriented as to cause current flow toward thejunction 21a therebetween; in other words, the inverter switches areconnected in parallel with each other via the transformer primary 80.

Electromagnetically coupled to the transformer primary 80 via a core 82,a transformer secondary 12a is shown included in the load circuit 6a foruse as resonance inductor having inductance L. It is understood that thecore 82 is so formed as to provide leakage flux. The transformersecondary or inductor 12a has one extremity connected to the lampterminal 18 via a coupling capacitor 7, and another extremity connectedto the lamp terminal 20. Connected between the other two lamp terminals17 and 19, the capacitor 11 coacts with the inductor 12a to form aserial LC resonance circuit.

This system operates just like the FIG. 1 system to restrict the phaseadvancement of the load current. In the inverter circuit 5c of the FIG.19 construction, the transformer core 82 may be magnetically saturatedif, because of phase advancement of the load current, the first inverterswitch Q₁, for instance, is turned on when a current is flowing throughthe diode section D₂ of the second inverter switch Q₂. The inverterswitches Q₁ and Q₂ can be protected from the resulting overcurrent asthe phase advancement is contained according to the invention.

Seventh Form

FIG. 20 shows the seventh preferred form of lamp lighting systemaccording to the invention, which differs from the FIG. 1 system in theconstructions of an inverter circuit 5d, load circuit 6b, invertercontrol circuit 8c, and phase advance detector circuit 10c.

The inverter circuit 5d is of known make having but one switch Q₁connected in series with a transformer primary 91 between the pair ofd.c. supply terminals 4c and 4d. Similar in construction to the FIG. 19load circuit 6a, the load circuit 6b has a transformer secondary 12belectromagnetically coupled to the transformer primary 91 via a core 92having leakage flux.

The phase advance detector circuit 10c is similar to the FIG. 14 circuit10a in dealing with only the half wave of the load current.

Although not shown in detail, the inverter control circuit 8c isunderstood to be similar in construction to the FIG. 2 counterpart 8except for the provision of a monostable multivibrator in place of theswitch control signal forming circuit 29, and for the absence of theswitching transistor 60 of the overriding frequency control circuit 31.The monostable multivibrator produce pulses for actuating the singleswitch Q₁ of the FIG. 20 inverter circuit 5d in response to the outputpulses of the comparator 52, FIG. 2. The single switching transistor,designated 59 in FIG. 2, of the FIG. 20 inverter control circuit 8ccauses the triangular wave generating capacitor, designated 32 in FIG.2, to discharge in response to the output from the phase advancedetector circuit 10c.

Thus, except for the inverter circuit 5d, the FIG. 20 system isessentially alike in construction and operation to the FIG. 1 system. Asan additional operational advantage, however, the phase advancecancellation system according to the invention serves to limit currentsurges that may occur when the single inverter switch Q₁ is turned onand off while the load circuit 6b is a capacitive reactance.

Although the present invention has been hereinbefore described in termsof highly specific embodiments thereof, it is not desired that theinvention be limited by the exact details of such disclosure. A varietyof modifications and alterations of the illustrated embodiments may beresorted to without departing from the scope of this invention. Forexample, an FET of the known kind having a terminal for currentdetection may be employed as the second inverter switch, therebyessentially incorporating the current detector 9 with the secondinverter switch.

What is claimed is:
 1. A lighting system for a discharge lamp, providingfor overcurrent protection of an inverter switch or switches, thelighting system comprising:(a) an inverter circuit for providing avariable frequency output voltage; (b) a load circuit connected to theinverter circuit and including a resonant circuit having a capacitorwith which a discharge lamp is to be connected in parallel, in order tocause an inversely frequency dependent voltage to be applied between apair of electrodes of the lamp according to a predefined resonancecharacteristic, the resonant circuit having a resonance frequency (f₀)that is less than a discharge start frequency (f₂) at which the lamp isto start glowing; (c) inverter control means connected to the invertercircuit for lighting up the lamp by changing the frequency of the outputvoltage of the inverter circuit from a first frequency (f₁) which ishigher than the discharge start frequency (f₂) to a second frequency(f₃) which is less than the resonance frequency (f₀) of the resonantcircuit, and for holding the lamp glowing by maintaining the outputvoltage of the inverter circuit at the second frequency; (d) phaseadvance detector means for ascertaining whether or not a current flowingthrough the load circuit is in phase advance with respect to the outputvoltage of the inverter circuit; and (e) overriding frequency controlmeans connected between the phase advance detector means and theinverter control means for causing the inverter control means to makethe frequency of the output voltage of the inverter circuit higher thanthe resonance frequency (f₀) of the resonant circuit when the currentflowing through the load circuit is ascertained to be in phase advancewith respect to the output voltage of the inverter circuit; (f) whereby,when found to be in phase advance with respect to the inverter outputvoltage, the load current is automatically delayed in phase in order toprotect a switch or switches included in the inverter circuit fromdestruction due to overcurrent.
 2. The discharge lamp lighting system ofclaim 1 wherein the inverter circuit includes a pair of inverterswitches to be alternately turned on and off for providing the variablefrequency output voltage, and wherein the inverter control meanscomprises:(a) a frequency control signal generator circuit for providinga frequency control signal; (b) a variable frequency pulse generatorcircuit connected to the frequency control signal generator circuit forproviding a series of pulses at a repetition rate dictated by thefrequency control signal; and (c) a switch control signal formingcircuit connected between the variable frequency pulse generator circuitand the inverter circuit for providing switch control signals thereby toturn the pair of inverter switches alternately on and off at ratesdetermined by the output pulses of the pulse generator circuit.
 3. Thedischarge lamp lighting system of claim 2 wherein the overridingfrequency control means comprises an overriding frequency controlcircuit connected to the variable frequency pulse generator circuit ofthe inverter control means for compulsorily modifying the repetitionrate of the output pulses thereof in the event of phase advancement ofthe load current.
 4. The discharge lamp lighting system of claim 2wherein the variable frequency pulse generator circuit of the invertercontrol means comprises:(a) a capactor for providing a triangular wavevoltage; (b) a charging circuit for charging the capacitor of the pulsegenerator circuit; (c) discharging means for discharging the capacitorof the pulse generator circuit; and (d) wave shaping means for shapingthe triangular wave output voltage of the capacitor into a series ofpulses.
 5. The discharge lamp lighting system of claim 4 wherein thefrequency control signal generated by the frequency control signalgenerator circuit of the inverter control means is a variable voltagesignal indicative, by its own magnitude, of the repetition rate of theoutput pulses of the variable frequency pulse generator circuit, andwherein the charging circuit of the inverter control means comprisesmeans for controlling the charging of the capacitor of the pulsegenerator circuit according to the voltage of frequency control signal.6. The discharge lamp lighting system of claim 4 wherein the overridingfrequency control means comprises a switch connected in parallel withthe capacitor of the variable frequency pulse generator circuit andadapted to be rendered conductive in the event of phase advancement ofthe load current.
 7. The discharge lamp lighting system of claim 2wherein the phase advance detector means comprises:(a) a currentdetector for providing a voltage signal indicative of the currentflowing through the load circuit; (b) a first comparator for comparingthe output voltage of the current detector with a positive referencevoltage; (c) a second comparator for comparing the output voltage of thecurrent detector with a negative reference voltage; (d) a first flipflop having a first input connected to the first comparator, and asecond input connected to the inverter control means for inputting oneof the switch control signals; (e) a second flip flop having a firstinput connected to the second comparator, and a second input connectedto the inverter control means for inputting the other of the switchcontrol signals; (f) a first logic circuit having a first inputconnected to the first comparator, and a second input connected to thefirst flip flop; and (g) a second logic circuit having a first inputconnected to the second comparator, and a second input connected to thesecond flip flop.
 8. The discharge lamp lighting system of claim 7wherein the variable frequency pulse generator circuit of the invertercontrol means comprises:(a) a capactor for providing a triangular wavevoltage; (b) a charging circuit for charging the capacitor of the pulsegenerator circuit; (c) discharging means for discharging the capacitorof the pulse generator circuit; and (d) wave shaping means for shapingthe triangular wave output voltage of the capacitor into a series ofpulses; and wherein the overriding frequency control means comprises:(a)a first switch connected in parallel with the capacitor of the pulsegenerator circuit and adapted to be turned on and off by the first logiccircuit of the phase advance detector means; and (b) a second switchconnected in parallel with the capacitor of the pulse generator circuitand adapted to be turned on and off by the second logic circuit of thephase advance detector means.
 9. The discharge lamp lighting system ofclaim 2 wherein the phase advance detector means comprises:(a) a currentdetector for providing a voltage signal indicative of the currentflowing through the load circuit; (b) a comparator for comparing theoutput voltage of the current detector with a reference voltage; (c) aflip flop having a first input connected to the comparator, and a secondinput connected to the inverter control means for inputting one of theswitch control signals; and (f) a logic circuit having a first inputconnected to the comparator, and a second input connected to the flipflop.
 10. The discharge lamp lighting system of claim 9 wherein thevariable frequency pulse generator circuit of the inverter control meanscomprises:(a) a capactor for providing a triangular wave voltage; (b) acharging circuit for charging the capacitor of the pulse generatorcircuit; (c) discharging means for discharging the capacitor of thepulse generator circuit; and (d) wave shaping means for shaping thetriangular wave output voltage of the capacitor into a series of pulses;and wherein the overriding frequency control means comprises:(a) aswitch connected in parallel with the capacitor of the pulse generatorcircuit and adapted to be turned on and off by the logic circuit of thephase advance detector means.
 11. The discharge lamp lighting system ofclaim 9 wherein the variable frequency pulse generator circuit of theinverter control means comprises:(a) a capactor for providing atriangular wave voltage; (b) a charging circuit for charging thecapacitor of the pulse generator circuit; (c) discharging means fordischarging the capacitor of the pulse generator circuit; and (d) waveshaping means for shaping the triangular wave output voltage of thecapacitor into a series of pulses; and wherein the overriding frequencycontrol means comprises:(a) an integrating circuit connected to thephase advance detector means for smoothing an output from the logiccircuit; and (b) a switch connected to the charging circuit formodifying the charging of the capacitor in response to an output fromthe integrating circuit.
 12. The discharge lamp lighting system of claim2 wherein the phase advance detector means comprises:(a) a currentdetector for providing a voltage signal indicative of a current flowingthrough one of the inverter switches; (b) a comparator for comparing theoutput voltage of the current detector with a reference voltage; (c) aflip flop having a first input connected to the comparator, and a secondinput connected to the inverter control means for inputting one of theswitch control signals; and (f) a logic circuit having a first inputconnected to the comparator, and a second input connected to the flipflop.
 13. The discharge lamp lighting system of claim 1 wherein theinverter circuit comprises:(a) a pair of inverter switchesinterconnected in series and to be connected across a direct currentpower supply; and (b) coupling means for connecting one of the inverterswitches in parallel with the load circuit.
 14. The discharge lamplighting system of claim 13 wherein the inverter circuit furthercomprises a pair of diodes each connected in parallel with, and orientedinversely to, one of the inverter switches.
 15. The discharge lamplighting system of claim 14 wherein the inverter circuit furthercomprises a pair of capacitors each connected in parallel with one ofthe inverter switches.
 16. The discharge lamp lighting system of claim14 wherein the inverter circuit further comprises a capacitor connectedin parallel with one of the inverter switches.
 17. The discharge lamplighting system of claim 1 wherein the inverter circuit comprises:(a) apair of voltage-dividing capacitors interconnected in series and to beconnected across a direct current power supply; and (b) a pair ofinverter switches interconnected in series and connected in parallelwith the serial circuit of the voltage-dividing capacitors; (c) the loadcircuit being connected between a junction between the pair ofvoltage-dividing capacitors and a junction between the pair of inverterswitches.
 18. The discharge lamp lighting system of claim 1 wherein theinverter circuit comprises:(a) a transformer primary winding having acenter tap to be connected to one of a pair of outputs of a directcurrent power supply; (b) a first inverter switch to be connectedbetween one extremity of the transformer primary winding and the otherof the outputs of the direct current power supply; and (c) a secondinverter switch to be connected between another extremity of thetransformer primary winding and said other output of the direct currentpower supply;and wherein the load circuit includes a transformersecondary winding electromagnetically coupled to the transformer primarywinding of the inverter circuit, the transformer secondary windingforming a part of the resonant circuit as inductor.
 19. The dischargelamp lighting system of claim 1 wherein the inverter circuitcomprises:(a) a transformer primary winding having one extremity to beconnected to one of a pair of outputs of a direct current power supply;and (b) an inverter switch to be connected between another extremity ofthe transformer primary winding and the other of the outputs of thedirect current power supply;and wherein the load circuit includes atransformer secondary winding electromagnetically coupled to thetransformer primary winding of the inverter circuit, the transformersecondary winding forming a part of the resonant circuit as inductor.20. The discharge lamp lighting system of claim 1 wherein the overridingfrequency control means comprises an overriding frequency controlcircuit connected between the phase advance detector means and theinverter control means for causing the inverter control means to makethe frequency of the output voltage of the inverter circuit higher thanthe resonance frequency (f₀) of the resonant circuit when the currentflowing through the load circuit is ascertained to be in phase advancewith respect to the output voltage of the inverter circuit, and forcausing the inverter control means to make the frequency of the outputvoltage of the inverter circuit lower than the resonance frequency (f₀)of the resonant circuit when the current flowing through the loadcircuit is ascertained to be in phase delay with respect to the outputvoltage of the inverter circuit.